Title :
Low Power Photomultiplier Base Circuit
Author :
Takeuchi, S. ; Nagai, T.
Author_Institution :
Department of Electronic Engineering, Saitama University 255 Shimo-Ohkubo, Urawa, Saitama, Japan
Abstract :
Low power photomultiplier base circuits, using high voltage FETs in the voltage divider, are described. Two examples of design are presented. One consists of P channel FETs for all stages of dynode and features extremely low stationary current(20 ¿A). The other consists of N channel FETs for the last 3 or 4 dynodes and the stationary current is about 130 ¿A. They ensure good linearity at high counting rates(up to the average anode current of 100 ¿A).
Keywords :
Anodes; Batteries; Current supplies; FET circuits; Linearity; Photomultipliers; Power engineering and energy; Power supplies; Solid scintillation detectors; Voltage;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.1985.4336794
