DocumentCode
906654
Title
Microstore - The Stanford Analog Memory Unit
Author
Walker, J.T. ; Chae, Soo-ik ; Shapiro, S. ; Larsen, R.S.
Author_Institution
Stanford Electronics Laboratory, Stanford University, Stanford, California 94305
Volume
32
Issue
1
fYear
1985
Firstpage
616
Lastpage
621
Abstract
An NMOS device has been developed which provides high speed analog signal storage and readout for time expansion of transient signals. This device takes advantage of HMOS-1 VLSI technology to implement an array of 256 storage cells. Sequential samples of an input waveform can be taken every 5 ns while providing an effective sampling aperture time of less than 1 ns. The design signal-to-noise ratio is 1 part in 2000. Digital control circuitry is provided on the chip for controlling the read-in and read-out processes. A reference circuit is incorporated in the chip for first order compensation of leakage drifts, sampling pedestals, and temperature effects.
Keywords
Analog memory; Apertures; Circuits; Digital control; MOS devices; Signal design; Signal sampling; Signal to noise ratio; Temperature; Very large scale integration;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1985.4336908
Filename
4336908
Link To Document