Title :
Testing of stuck-open faults in generalised Reed-Muller and EXOR sum-of-products CMOS circuits
Author :
Rahaman, H. ; Das, D.K. ; Bhattacharya, B.B.
Author_Institution :
IT Dept., B.E. Coll., Howrah, India
Abstract :
Testable designs of GRM (generalised Reed-Muller) and ESOP (EXOR sum-of-products) circuits have been proposed for robustly detecting all single stuck-open faults in their CMOS implementation. It is shown that for an n-variable boolean function, a sequence of (4n + 13) vectors is sufficient to detect all single stuck-open faults in a GRM circuit. For an ESOP circuit, a test sequence of length (2n + 10) is sufficient. In the first case, the EXOR part is designed as a tree of depth ≤2(log┌p + 1 ┐), and for the latter, as a linear cascade of length ≤(p + 1), where p is the number of product terms in the GRM or ESOP expression. For both the cases the test sequence is universal, i.e. independent of the function and the circuit under test, and can be stored in a ROM for built-in self-test.
Keywords :
CMOS logic circuits; fault diagnosis; logic testing; CMOS circuits; EXOR sum-of-products circuits; generalised Reed-Muller circuits; stuck open fault testing;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings -
DOI :
10.1049/ip-cdt:20040031