DocumentCode :
909804
Title :
Asynchronous binary dividing array
Author :
Walker, P.A.W.
Author_Institution :
University of Liverpool, Department of Electrical Engineering & Electronics, Liverpool, UK
Volume :
6
Issue :
16
fYear :
1970
Firstpage :
515
Lastpage :
517
Abstract :
An iterative dividing array is proposed which is self-timing or asynchronous in operation. Based on the normalising principle, the average number of additions and subtractions to be performed is less than one-half that necessary with simple algorithms. This fact is exploited to reduce division time.
Keywords :
asynchronous sequential logic; cellular arrays; dividing circuits;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19700358
Filename :
4234857
Link To Document :
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