Title :
Design of a reliable and self-testing VLSI datapath using residue coding techniques
Author :
Sayers, I.L. ; Kinniment, D.J. ; Chester, E.G.
Author_Institution :
University of Newcastle upon Tyne, Department of Electrical & Electronic Engineering, Newcastle upon Tyne, UK
fDate :
6/1/1986 12:00:00 AM
Abstract :
The testing of VLSI circuits is becoming progressively more difficult as device densities increase. This has brought about several proposals for designing VLSI circuits with testability built in. A method is presented in the paper for the design of easily testable VLSI circuits with a view to producing fault tolerant systems. A microprocessor datapath is used to illustrate the technique. The method used for checking the VLSI devices is an error detecting code, in this case a residue code. Residue codes offer several advantages over linear block codes for providing testability in a wide range of VLSI circuits. A detailed evaluation of the increase in chip area required to produce a self testing chip is also given in the paper.
Keywords :
VLSI; encoding; error detection codes; chip area; error detecting code; fault tolerant systems; linear block codes; microprocessor datapath; residue coding techniques; self-testing VLSI datapath; testability;
Journal_Title :
Solid-State and Electron Devices, IEE Proceedings I
DOI :
10.1049/ip-i-1.1986.0025