DocumentCode :
910838
Title :
Scheduling of DSP programs onto multiprocessors for maximum throughput
Author :
Hoang, Phu D. ; Rabaey, Jan M.
Author_Institution :
Dept. of Electr. Eng., California Univ., Berkeley, CA, USA
Volume :
41
Issue :
6
fYear :
1993
fDate :
6/1/1993 12:00:00 AM
Firstpage :
2225
Lastpage :
2235
Abstract :
A flow graph scheduling algorithm that simultaneously considers pipelining, retiming, parallelism, and hierarchical node decomposition is presented. The ability to simultaneously consider the many types of concurrency allows the scheduler to find efficient multiprocessor solutions for a wide range of DSP applications. It has been implemented as part of a software environment for scheduling DSP programs onto fixed and configurable multiprocessor systems. The results on a set of benchmarks demonstrate that the algorithm achieves near ideal speedups even across programs with different types of concurrency
Keywords :
multiprocessing programs; scheduling; signal processing; DSP programs; concurrency; flow graph scheduling algorithm; hierarchical node decomposition; multiprocessor systems; parallelism; pipelining; retiming; software environment; Computer architecture; Concurrent computing; Delay effects; Digital signal processing; Flow graphs; Multiprocessing systems; Pipeline processing; Processor scheduling; Signal processing algorithms; Throughput;
fLanguage :
English
Journal_Title :
Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1053-587X
Type :
jour
DOI :
10.1109/78.218149
Filename :
218149
Link To Document :
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