Title :
S.T.T. design of asynchronous sequential counters using ´unit´ machines
Author :
Cheng, R.M.H. ; Okpere, K.O.
Author_Institution :
University of Birmingham, Department of Mechnical Engineering, Birmingham, UK
Abstract :
A systematic procedure for the parallel cascading of asynchronous counters (referred to as ´unit´ machines) is proposed as a method of realising, in a single-transition-time (s.t.t.) manner, an asynchronous counter of any code.
Keywords :
asynchronous sequential logic; counters; flip-flops;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19700504
