DocumentCode
912209
Title
Defining and Implementing a Multilevel Design Representation with Simulation Applications
Author
Thomas, Donald E. ; Nestor, John A.
Author_Institution
Department of Electrical and Computer Engineering, Carnegie-Mellon University, Pittsburgh, PA, USA
Volume
2
Issue
3
fYear
1983
fDate
7/1/1983 12:00:00 AM
Firstpage
135
Lastpage
145
Abstract
This paper describes the definition and implementation of a multilevel representation which includes both behavioral and structural information. Information for the representation is generated by the CMU-DA synthesis system. A timing abstraction aid which extracts logic level timing information from a detailed implementation and makes it available for the ISPS behavioral simulator is discussed. Such a multilevel representation and design aid allows the system level designers to be in a closed loop of design aids with the technology level designers.
Keywords
Circuit simulation; Computational modeling; Data mining; Design automation; Documentation; Fabrication; Logic gates; Process design; Timing; Very large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1983.1270031
Filename
1270031
Link To Document