Title :
Suppression of parasitic thick-field conduction mechanisms in silicon-gate m.o.s. integrated circuits
Author_Institution :
Solid State Data Sciences Corporation, Hauppauge, USA
Abstract :
In a silicon-gate m.o.s. integrated circuit, because of the presence of the additional polycrystalline-silicon interconnection layer, it is possible virtually to eliminate parasitic thick-field transistor action at certain critical points in the circuit by employing an earthed polycrystalline-silicon region as an electrostatic shield between metal and substrate.
Keywords :
integrated circuits; metal-insulator-semiconductor devices; metal-insulator-semiconductor structures; shielding; electrostatic shield between metal and substrate; polycrystalline silicon interconnection layer; silicon gate MOS integrated circuits; suppression parasitic thick field conduction mechanisms;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19710009
