• DocumentCode
    912453
  • Title

    Transient analysis of modified t.t.l. gate

  • Author

    Rabbat, N.B. ; Ryan, W.D. ; Hossain, S.Q.A.M.A.

  • Author_Institution
    Queens University of Belfast, Department of Electrical & Electronic Engineering, Belfast, UK
  • Volume
    7
  • Issue
    1
  • fYear
    1971
  • Firstpage
    22
  • Lastpage
    24
  • Abstract
    The letter derives expressions for the transient response of the modified t.t.l. NAND/NOR gate using a piecewise linear analysis. The expressions are presented in a form suitable for incorporation into a computer-aided circuit-analysis program based on the macromodelling concept and intended for the analysis of relatively large arrays of integrated-circuit logic gates. Results are compared with experimental observations.
  • Keywords
    NAND circuits; NOR circuits; computer-aided circuit analysis; logic circuits; logic gates; transistor-transistor logic; computer aided circuit analysis; large arrays of integrated circuits logic gates; macromodelling; modified TTL NAND/NOR gate; transient analysis;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19710016
  • Filename
    4235120
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=912453