Title :
Experimental Evidence for a New Single-Event Upset (SEU) Mode in a CMOS SRAM Obtained from Model Verification
Author :
Zoutendyk, J.A. ; Smith, L.S. ; Soli, G.A. ; Lo, R.Y.
Author_Institution :
Jet Propulsion Laboratory California Institute of Technology Pasadena, California 91109
Abstract :
Modeling of SEU has been done in a CMOS static RAM containing one-micron channel-length transistors fabricated from a P-well epilayer process using both circuit-and numerical-simulation techniques. The modeling results have been experimentally verified with the aid of heavy-ion beams obtained from a three-stage tandem van de Graaff accelerator. Experimental evidence for a new SEU mode in an on n-channel device is presented.
Keywords :
Analytical models; CMOS process; CMOS technology; Circuit simulation; Computational modeling; Random access memory; Read-write memory; Semiconductor device modeling; Single event upset; Transistors;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.1987.4337468
