DocumentCode
913202
Title
An Integrated Automated Layout Generation System for DSP Circuits
Author
Rabaey, Jan M. ; Pope, Stephen P. ; Brodersen, Robert W.
Author_Institution
Electronics Research Laboratory, the University of California, Berkeley, CA,USA
Volume
4
Issue
3
fYear
1985
fDate
7/1/1985 12:00:00 AM
Firstpage
285
Lastpage
296
Abstract
An integrated CAD system for the automated design of digital signal-processing (DSP) circuits for audio and telecommunication applications is described. The system uses as unique input a symbolic description of algorithm. This representation is translated into an actual layout using a two-step process. First, the symbolic input is mapped into the target architecture, which consists basically of a set of concurrent processors and dedicated I/O circuitry. The resulting hardware configuration is compiled into a layout description through a full exploitation of the hierarchy and the modularity of the architecture, calling consecutively a tiler, a floorplanner, and a global placement and routing tool. All these layout generation tools are able to support a wide range of technologies. The provision of a dedicated register transfer level simulator allows for the efficient debugging and algorithmic checking of the real-time operating signal-processing algorithms. The efficiency and the usefulness of this design methodology has been demonstrated by multiple examples. Experiments have shown that the use of these techniques can reduce the complete design process to a few months.
Keywords
Biographies; Computer architecture; Concurrent computing; Design automation; Digital signal processing; Integrated circuit technology; Signal generators; Signal processing; Signal processing algorithms; Throughput;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1985.1270124
Filename
1270124
Link To Document