DocumentCode :
914245
Title :
A Statistical Design Rule Developer
Author :
Razdan, Rahul ; Strojwas, Andrzej J.
Author_Institution :
Digital Equipment Corporation, Hudson, MA, USA
Volume :
5
Issue :
4
fYear :
1986
fDate :
10/1/1986 12:00:00 AM
Firstpage :
508
Lastpage :
520
Abstract :
In this paper, a general methodology for design rule development and the CAD tool which implements this methodology, Statistical Design Rule Developer (STRUDEL), are presented. The focus of the proposed approach is the concept of a statistical design rule, which is defined as a geometric design rule with an associated probability of failure. Global lateral variations obtained from FABRICS, and local spot defects obtained from measurements are taken into account when calculating the probability of failure. A failure model which accounts for catastrophic faults has been enhanced to include some parametric faults. STRUDEL can be used as a guide to generate layout design rules and may be extended to a wide range of applications including coarse yield estimation during design rules check.
Keywords :
Design automation; Design methodology; Fabrics; Helium; MOS devices; Probability; Random access memory; Silicon; Very large scale integration; Yield estimation;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.1986.1270222
Filename :
1270222
Link To Document :
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