DocumentCode
914354
Title
Design and implementation of three-valued logic systems with M.O.S. integrated circuits
Author
Mouftah, H.T. ; Smith, K.C.
Author_Institution
Queen´´s University, Department of Electrical Engineering, Kingston, Canada
Volume
127
Issue
4
fYear
1980
fDate
8/1/1980 12:00:00 AM
Firstpage
165
Lastpage
168
Abstract
A method of design of three-valued logic circuits which reduces the need for complementary pairs of m.o.s. integrated circuits is presented. Circuits of basic ternary operators (inverters, NAND and NOR) are utilising single m.o.s. transistors. Based on these ternary operators it is possible to design simpler and cheaper three-valued logic systems. As examples, the construction of the Jk arithmetic circuit and the T-gate are described.
Keywords
field effect integrated circuits; logic design; logic gates; ternary logic; MOS integrated circuits; MOS transistors; NAND; NOR; T gate; complementary pairs; invertors; ternary operators; three valued logic systems;
fLanguage
English
Journal_Title
Electronic Circuits and Systems, IEE Proceedings G
Publisher
iet
ISSN
0143-7089
Type
jour
DOI
10.1049/ip-g-1:19800028
Filename
4644600
Link To Document