DocumentCode
914582
Title
The Outline Procedure in Pattern Data Preparation for Vector-Scan Electron-Beam Lithography
Author
Komatsu, Kazuhiko ; Suzuki, Masanori
Author_Institution
Atsugi Electrical Communication Laboratories, Nippon Telegraph and Telephone Corporation, Kanagawa, Japan
Volume
6
Issue
1
fYear
1987
fDate
1/1/1987 12:00:00 AM
Firstpage
145
Lastpage
151
Abstract
This paper describes a new algorithm and some applications of an outline procedure for LSI mask patterns. The outline procedure, which extracts the outline of designed primitive shapes, is required in pattern data preparation for electron-beam (e-beam) writing. A novel algorithm is developed to extract the outlines of patterns from a large number of designed shapes within a whole chip area. The algorithm is able to extract the outline with no limit to the number of vertices in a reasonable time. A program in which the algorithm is implemented is able to compensate for some process biases and leads to a successful 1-Mbit DRAM e-beam fabrication. Some other related applications, such as proximity effect correction, are also presented.
Keywords
Algorithm design and analysis; Data mining; Fabrication; Large scale integration; Lithography; Proximity effect; Random access memory; Resists; Shape; Writing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1987.1270256
Filename
1270256
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