• DocumentCode
    914810
  • Title

    Symbolic Layout System: Application Results and Functional Improvements

  • Author

    Terai, Masayuki ; Ajioka, Yoshihide ; Noda, Tomoyoshi ; Ozaki, Masaru ; Umeki, Tsunenori ; Sato, Koji

  • Author_Institution
    LSI Research and Development Laboratory, Mitsubishi Electric Corporation, Itami, Japan
  • Volume
    6
  • Issue
    3
  • fYear
    1987
  • fDate
    5/1/1987 12:00:00 AM
  • Firstpage
    346
  • Lastpage
    354
  • Abstract
    This paper provides an outline, together with application results and functional improvements, of the symbolic layout system MGX. MGX was developed to support the layout design of the functional blocks of microprocessors for MOS technology. The point considered the most important when we started developing MGX is reducing design time without much waste of silicon area. In order to achieve this goal, a layout style in MGX in which all symbolic layout elements are on movable grid points and which has an orderly structure is adopted, and the fast compaction algorithm is selected. Another consideration for the system is to support the whole LSI layout process. Using MGX, a 16-bit microcontroller chip was successfully designed. MGX offered high transistor packing density and high productivity of the layout design. The experience with this layout design has shown that another goal to be achieved in the development of a symbolic layout system is the ability to update designed physical layout patterns with advances in LSI fabrication technology without having to redo the layout. Hence, MGX has been improved so as to deal with various design rules which may become possible with advances in LSI fabrication technology and to give higher transistor packing density. Experimental results show that the transistor packing density of the layout of a D flip-flop which is designed by using MGX increases by approximately 39 percent due to these improvements.
  • Keywords
    Circuits; Compaction; Design methodology; Fabrication; Large scale integration; Macrocell networks; Microprocessors; Silicon; Transistors; Wiring;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.1987.1270279
  • Filename
    1270279