DocumentCode :
915009
Title :
A Tile-Expansion Router
Author :
Margarino, A. ; Romano, A. ; De Gloria, A. ; Curatelli, F. ; Antognetti, Paolo
Author_Institution :
Dipartimento di Ingegneria Biofisica ed Elettronica, University of Genova, Genova, Italy
Volume :
6
Issue :
4
fYear :
1987
fDate :
7/1/1987 12:00:00 AM
Firstpage :
507
Lastpage :
517
Abstract :
A router based on a tile-expansion algorithm and corner stitching data structure is presented. This program finds connections with a minimum number of jogs and it ensures that a possible solution will be found. Using a working tree, it allows an exhaustive and recursive search along all available areas for routing. The connections are made going back through the working tree until the starting terminal is reached. There are two Manhattan layers that the user can choose for each direction to implement connections; the router can be used to wire hierarchical blocks using a chip planning methodology. The program has been successfully tested on examples concerning different classes of problems.
Keywords :
Data structures; Design automation; Design methodology; Heuristic algorithms; Merging; Routing; Testing; Tiles; Wire; Wiring;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.1987.1270299
Filename :
1270299
Link To Document :
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