DocumentCode
915311
Title
A Parallel Simulated Annealing Algorithm for the Placement of Macro-Cells
Author
Casotto, Andrea ; Romeo, Fabio ; Sangiovanni-Vincentelli, Alberto
Author_Institution
Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA, USA
Volume
6
Issue
5
fYear
1987
fDate
9/1/1987 12:00:00 AM
Firstpage
838
Lastpage
847
Abstract
A modification of the classical Simulated Annealing algorithm for the macro-cell placement problem is proposed for implementation on multiprocessor systems. The algorithm has been implemented on the Sequent Balance 8000, a multiprocessor system with a shared-memory architecture. Experimental results show that the new algorithm obtains results comparable in quality to those of the single processor version; processor utilization is greater than 80 percent using up to eight processors.
Keywords
Ambient intelligence; Central Processing Unit; Circuit simulation; Logic; Memory architecture; Multiprocessing systems; Robustness; Routing; Shape; Simulated annealing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1987.1270327
Filename
1270327
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