Title :
Leakage Power Analysis and Reduction for Nanoscale Circuits
Author :
Agarwal, Amit ; Mukhopadhyay, Saibal ; Raychowdhury, Arijit ; Roy, Kaushik ; Kim, Chris H.
Author_Institution :
Intel Corp., Hillsboro, OR
Abstract :
Leakage current in the nanometer regime has become a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickness scale downward. Various techniques are available to reduce leakage power in high-performance systems
Keywords :
CMOS logic circuits; leakage currents; nanotechnology; CMOS circuit; channel length; high-performance system; leakage current; leakage power analysis; leakage power reduction; nanometer regime; nanoscale circuit; power dissipation; threshold voltage; CMOS technology; Circuits; Doping profiles; Energy consumption; Leakage current; Logic design; Maintenance; Nanoscale devices; Subthreshold current; Thickness control; CMOS; leakage power reduction; nanoscale circuits; technology scaling;
Journal_Title :
Micro, IEEE
