VLSI reliability challenges: from device physics to wafer scale systems

Author

Takeda, Eiji ; Ikuzaki, Kunihiko ; Katto, Hisao ; Ohji, Yuzuru ; Hinode, Kenji ; Hamada, Akemi ; Sakuta, Toshiyuki ; Funabiki, Takahiro ; Sasaki, Toshio

Author_Institution

Hitachi Ltd., Tokyo, Japan

Volume

81

Issue

5

fYear

1993

fDate

5/1/1993 12:00:00 AM

Firstpage

653

Lastpage

674

Abstract

The philosophical and practical differences between Japanese and US IC industries in regard to VLSI reliability, as well as recent research topics and new analysis methods such as wafer scale testing, are discussed. It is suggested that a new approach to VLSI reliability is needed in response to the paradigm shift being brought about by simple scaling limitations, increased process complexity and application of VLSI to advanced systems. An example of this shift is the movement from simple failure analysis by sampling the output of a manufacturing line to the building-in-reliability approach. To introduce and expand on the building-in reliability approach in VLSIs, the authors discuss the required deeper physical understanding of such important processes as hot-carrier effects, dielectrics and metallization

Keywords

VLSI; circuit reliability; dielectric thin films; failure analysis; hot carriers; integrated circuit manufacture; integrated circuit technology; integrated circuit testing; metallisation; reviews; Japanese IC industry; US IC industry; VLSI reliability; WSI; device physics; dielectrics; failure analysis; hot-carrier effects; manufacturing line; metallization; process complexity; wafer scale systems; wafer scale testing; Costs; Electronics industry; Fabrication; Failure analysis; HEMTs; MOSFETs; Physics; Sampling methods; Transistors; Very large scale integration;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/5.220898

Filename

220898