Title :
Memory LSI reliability
Author :
Fukuma, Masao ; Furuta, Hiroshi ; Takada, Masahide
Author_Institution :
NEC Corp., Sagamihara, Japan
fDate :
5/1/1993 12:00:00 AM
Abstract :
Large-scale integrated (LSI) memory circuit reliability is reviewed. Reliability of large-scale integrated memory circuits is discussed. The major physical mechanisms for failures in memory LSIs and measures to counter these failures are reviewed. Fault-tolerant techniques, divided into the spare row/column line substitution. (SLS) technique and the on-chip error-correcting code (ECC) technique, developed to overcome hard and soft failures are described. Design approaches for realizing high performance and high reliability are also discussed
Keywords :
circuit reliability; error correction; integrated memory circuits; large scale integration; LSI reliability; hard failures; memory circuit reliability; on-chip error-correcting code; onchip ECC; soft failures; spare row/column line substitution; Capacitors; Degradation; Error correction; Failure analysis; Hot carriers; Large scale integration; MOSFET circuits; Maintenance; Random access memory; Wiring;
Journal_Title :
Proceedings of the IEEE
