• DocumentCode
    915978
  • Title

    A cost-effective VLSI architecture for anisotropic texture filtering in limited memory bandwidth

  • Author

    Shin, Hyun-Chul ; Lee, Jin-Aeon ; Kim, Lee-Sup

  • Author_Institution
    SOC CT Group, LG Electron. Co., Seoul, South Korea
  • Volume
    14
  • Issue
    3
  • fYear
    2006
  • fDate
    3/1/2006 12:00:00 AM
  • Firstpage
    254
  • Lastpage
    267
  • Abstract
    Texture mapping is one of the techniques that express realism in three-dimensional (3-D) graphics. To produce high-quality images, various anisotropic filtering methods have been proposed for texture mapping. These methods require more texels than isotropic (trilinear) filtering method. In spite of increases to texture memory bandwidth, however, texture memory bandwidth is still a bottleneck of texture-filtering hardware. Consequently, an exact filtering method is required for good-quality images in a limited texture memory bandwidth. In this paper, we propose anisotropic texture filtering based on edge functions. Our method proposes an exact footprint-shape approximation with edge functions for generating weights. For real-time filtering, the weight plays a key role in effective filtering of the restricted texels loaded from memory. The normalized value of the edge function gives the distance relative to the contribution of texels to a final intensity. Calculating a Gaussian filter using this normalized value, generates a good weight. The quality of rendered images is superior to other anisotropic filtering methods with the same restricted number of texels. For images of the same quality, our method requires less than half the texels of other methods. Consequently, the improvement in performance is more than twice that of other methods. With low hardware overheads, our method can be implemented at a reasonable cost. In practice, the algorithm is demonstrated through VLSI implementation. The hardware, which is described by verilog and synthesized with a 0.35-/spl mu/m 3.3-V standard cell library, is operated at 100 MHz and it generates 100 M texture-filtered RGB pixel-color values per second.
  • Keywords
    VLSI; antialiasing; computer graphic equipment; filtering theory; image texture; pipeline processing; rendering (computer graphics); 0.35 micron; 100 MHz; 3.3 V; 3D graphics; Gaussian filter; VLSI architecture; anisotropic texture filtering; anti aliasing; computer graphics; edge functions; exact footprint-shape approximation; limited memory bandwidth; real-time filtering; rendered images; texels; texture mapping; Anisotropic filters; Anisotropic magnetoresistance; Bandwidth; Costs; Filtering; Graphics; Hardware; Libraries; Rendering (computer graphics); Very large scale integration; Anti-aliasing; computer graphics; costs; filtering; performance;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2006.871761
  • Filename
    1624375