DocumentCode :
916808
Title :
Partitioning of Boolean functions by variable complementation
Author :
Edwards, C.R.
Author_Institution :
University of Bath, School of Electrical Engineering, Bath, UK
Volume :
8
Issue :
5
fYear :
1972
Firstpage :
138
Lastpage :
140
Abstract :
A method is presented which enables any Boolean function(s), defined on n variables, to be partitioned. Each partition so extracted is independent of a selected number of the defining variables, and hence each member of such a partition may be defined on the remaining variables. The method is applicable to logic-network synthesis, and its exhaustive application enables a fast implementation of the Quine-McCluskey1¿3 minimisation algorithm.
Keywords :
Boolean functions; logic design; minimisation of switching nets; Boolean function; logic design; logic network synthesis; minimisation algorithm; switching net minimisation;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19720100
Filename :
4235547
Link To Document :
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