DocumentCode
916871
Title
Fully integrated CMOS limiting amplifier with offset compensation network
Author
Chen, D.D. ; Yeo, K.S. ; Do, M.A. ; Boon, C.C.
Author_Institution
Nanyang Technol. Univ., Singapore
Volume
43
Issue
20
fYear
2007
Firstpage
1084
Lastpage
1085
Abstract
A fully integrated CMOS limiting amplifier (LA) is presented. Its novel implementation of the offset compensation circuit completely removes bulky off-chip RC components. The LA is designed using a 0.18 mum CMOS technology and it obtains a 40 dB gain with a bandwidth of 1.8 GHz. The total power consumption is only 18.39 mW under a 1.8 V voltage supply.
Keywords
CMOS integrated circuits; amplifiers; compensation; limiters; bandwidth 1.8 GHz; bulky off-chip RC components; gain 40 dB; integrated CMOS limiting amplifier; offset compensation network; power 18.39 mW; size 0.18 mum; voltage 1.8 V;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20071881
Filename
4338197
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