DocumentCode
917565
Title
X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis
Author
Tyszer, Jerzy ; Rajski, Janusz ; Mrugalski, Grzegorz ; Mukherjee, Nilanjan ; Kassab, Mark ; Cheng, Wu-Tung ; Sharma, Manish ; Lai, Liyang
Author_Institution
Poznari Univ. of Technol., Poznan
Volume
24
Issue
5
fYear
2007
Firstpage
476
Lastpage
485
Abstract
This article describes a two-stage test response compactor with an overdrive section, scan chain selection logic, and an on-chip comparator and registration scheme for efficient signature-based diagnosis. This solution offers compaction ratios much higher than those determined by the ratio of scan chains to compactor outputs, and it guarantees very good observability and diagnostic resolution of scan errors, even for a large number of Xs. Experimental results confirm that the proposed solution does not compromise test quality and requires a minimal amount of information to control the compactor itself.
Keywords
fault diagnosis; fault tolerance; logic testing; microprocessor chips; faulty behavior; on-chip compression; on-chip registration; scan chain selection logic; signature-based diagnosis; test data volume; test- based diagnostic information; two-stage test response compactor; x-tolerant compactor; Built-in self-test; Circuit testing; Compaction; Error correction; Graphics; Logic testing; Observability; Performance evaluation; Registers; Silicon; DFT; embedded test; fault diagnosis; on-chip collection of test data; scan-based designs; selective compaction of test responses;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2007.177
Filename
4338470
Link To Document