Title :
Iterative Viterbi algorithm: implementation issues
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
fDate :
3/1/2004 12:00:00 AM
Abstract :
We address several issues for implementing the iterative Viterbi decoder. We show that 3-bit branch metric quantization, 7- or 8-bit state metric precision, and a survivor length of five times the constraint length yields little degradation for the iterative Viterbi algorithm (IVA). Our results show that without changing the VA hardware (except adding some additional circuits), the error performance of several standard systems can be significantly improved.
Keywords :
Viterbi decoding; concatenated codes; iterative decoding; turbo codes; branch metric quantization; iterative viterbi algorithm; iterative viterbi decoding; serial concatenated codes; state metric precision; turbo decoding; AWGN; Circuits; Concatenated codes; Convolution; Convolutional codes; Cyclic redundancy check; Iterative algorithms; Iterative decoding; Quantization; Viterbi algorithm;
Journal_Title :
Wireless Communications, IEEE Transactions on
DOI :
10.1109/TWC.2003.821149
