• DocumentCode
    918704
  • Title

    Synchronizing Redundant Cores in a Dynamic DMR Multicore Architecture

  • Author

    Golander, Amit ; Weiss, Shlomo ; Ronen, Ronny

  • Author_Institution
    Dept. of Electr. Eng., Tel Aviv Univ., Tel Aviv
  • Volume
    56
  • Issue
    6
  • fYear
    2009
  • fDate
    6/1/2009 12:00:00 AM
  • Firstpage
    474
  • Lastpage
    478
  • Abstract
    We introduce the difficulties in processing context switches, exceptions, and interrupts in DMR architectures. We propose ways to address these problems in a dynamic DMR (DDMR) architecture, providing methods that assure both cores detect the event, synchronize it to the same instruction, perform a secure context switch, run correct interrupt service routines, and avoid process termination. DDMR uses a time-division multiplexing (TDM) ring architecture to dynamically connect pairs of cores. We enhance this protocol to include the different message types required to handle interrupts and exceptions. We also propose a more efficient address-based, rather than TDM-based, ring architecture.
  • Keywords
    circuit reliability; microprocessor chips; multiprocessing systems; redundancy; time division multiplexing; TDM ring architecture; address-based ring architecture; chip multiprocessor reliability; dynamic DMR multicore architecture; event detection; time-division multiplexing; Context-aware services; Event detection; Hardware; Joining processes; Multicore processing; Operating systems; Protocols; Redundancy; Switches; Dual modular redundancy (DMR); reliability; ring;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2009.2020930
  • Filename
    4982698