• DocumentCode
    919111
  • Title

    Algorithm applicable to logic-circuit synthesis

  • Author

    Edwards, C.R.

  • Author_Institution
    University of Bath, School of Electrical Engineering, Bath, UK
  • Volume
    8
  • Issue
    17
  • fYear
    1972
  • Firstpage
    442
  • Lastpage
    444
  • Abstract
    A method is described which, in its exhaustive application, synthetises logic functions by means of any chosen gates or subsystems. The method employs Boolean matrices and is computer-oriented. The algorithm in its simplest form does not afford optimisation, except on a comprehensive-search basis. In this respect, the procedure is similar to those of Roth et al. and Ashenhurst, and embodies case of implementation together with the ability to handle multiple-output problems.
  • Keywords
    Boolean algebra; computer-aided logic design; Boolean algebra; CAD; computer aided logic design; gates; logic circuit synthesis;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19720321
  • Filename
    4235780