Analog phase measuring circuit for digital CMOS ICs

Author

Rothermal, A. ; Dell´Ova, F.

Author_Institution

Thomson Consumer Electron., Villingen, Germany

Volume

28

Issue

7

fYear

1993

fDate

7/1/1993 12:00:00 AM

Firstpage

853

Lastpage

856

Abstract

A circuit measuring the phase of incoming asynchronous signals relative to the system clock in digital signal processing is described. The system clock can be in the range from 10 to 20 MHz, as is typical for video signal processing applications. As a reference in the asynchronous signal the positive or negative slope is taken. Its phase is measured with a resolution of 1/32 of a system clock cycle (approximately 1.5 to 3 ns). Pure digital CMOS technology without precision components is used, to enable combined integration on processor chips. Timing precision (jitter) is better than 200 ps without any adjustments. One external capacitor is needed

Keywords

CMOS integrated circuits; digital integrated circuits; integrated circuit testing; phase measurement; 1.5 to 3 ns; 10 to 20 MHz; asynchronous signals; digital CMOS ICs; digital signal processing; system clock; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Clocks; Digital signal processing; Phase measurement; Semiconductor device measurement; Signal processing; Signal resolution; Video signal processing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.222188

Filename

222188