DocumentCode :
919170
Title :
Quality assurance and upgrade of analog characteristics by fast mismatch analysis option in network analysis environment
Author :
Oehm, J. ; Schumacher, K.
Author_Institution :
Dortmund Univ., Germany
Volume :
28
Issue :
7
fYear :
1993
fDate :
7/1/1993 12:00:00 AM
Firstpage :
865
Lastpage :
871
Abstract :
The usefulness and power of fast mismatch analysis options within the network analysis environment are demonstrated. Simulated yield statistics and measurements of a fabricated analog application are reported and compared. The physical connections introduced between local and global process variations lead to new procedures for calculating the overall tolerance ranges of the electrical characteristics. The simulation examples illustrate the comfort of the implementation and provide information regarding interconnections between local mismatch effects and circuit design
Keywords :
analogue circuits; circuit analysis computing; linear integrated circuits; quality control; fast mismatch analysis; local mismatch effects; network analysis environment; quality assurance; simulated yield statistics; Circuit simulation; Electric variables; Equations; Fabrication; Intelligent networks; MOSFETs; Mirrors; Production; Quality assurance; SPICE;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.222191
Filename :
222191
Link To Document :
بازگشت