A mixed-mode voltage down converter with impedance adjustment circuitry for low-voltage high-frequency memories

Author

Ooishi, Tsukasa ; Komiya, Yuichiro ; Hamade, Kei ; Asakura, Mikio ; Yasuda, Kenichi ; Furutani, Kiyohiro ; Kato, Tetsuo ; Hidaka, Hideto ; Ozaki, Hideyuki

Author_Institution

ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan

Volume

31

Issue

4

fYear

1996

fDate

4/1/1996 12:00:00 AM

Firstpage

575

Lastpage

585

Abstract

This paper proposes a low voltage operation technique for a voltage down converter (VDC) using a mixed-mode VDC (MM-VDC), that combines an analog VDC and a digital VDC, and provides high frequency application using an impedance adjustment circuitry (IAC). The MM-VDC operates with a small response delay and a large supply current. Moreover, the IAC is adopted by the MM-VDC for wide range frequency operation under low voltage conditions. The IAC can change the supply current capability in accordance with the load operation frequency to avoid the overshoot and undershoot problems caused by the unmatched supply current. A 64 Mb-DRAM test device operated with the MM-VDC achieves well-controlled internal voltage (VCI) level and achieves high frequency operation. These systems, the MM-VDC and the IL-VDC, can be applicable for both low voltage and high frequency operation

Keywords

CMOS memory circuits; DRAM chips; convertors; electric impedance; mixed analogue-digital integrated circuits; 64 Mbit; LV high-frequency memories; impedance adjustment circuitry; load operation frequency; low-voltage HF memories; mixed-mode voltage down converter; supply current capability; Analog-digital conversion; Circuit stability; Circuits; Controllability; Current supplies; Delay; Digital-to-frequency converters; Frequency conversion; Impedance; Low voltage; Power dissipation; Power supplies; Testing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.499735

Filename

499735