Computer-Aided Large-Signal Measurement of IMPATT-Diode Electronic Admittance

A technique for the measurement of the Iarge-signal electronic admittance of IMPATT diodes as a function of frequency and RF voltage level using the network analyzer is described. The method de-embeds the admittance of the active region of the device from the mounting and measurement circuitry without physical disturbance of the diode. The small series resistance of the diode at breakdown is included in the embedding network together with the mount and diode package parameters. The determination of transformation networks between the measurement port and the active chip through a simple calibration procedure, a knowledge of the diode admittance below breakdown, and computer-aided optimization constitute the de-embedding procedure. Experimental electronic admittance curves are given for a low-power (100-mW) silicon IMPATT diode in the frequency range 5.7-6.5 GHz and with RF voltage levels applied across the active chip in the range 0-24 V, with an estimated error of less than 20 percent (typically 5 percent) in admittance values.