DocumentCode :
922131
Title :
Fault detection and correction in array computers for image processing
Author :
Moore, W.R.
Author_Institution :
General Electric Company plc, Hirst Research Centre, Wembley, UK
Volume :
129
Issue :
6
fYear :
1982
fDate :
11/1/1982 12:00:00 AM
Firstpage :
229
Lastpage :
234
Abstract :
The paper addresses the problems of detecting and correcting faults that may occur in arrays of processors used for image processing. The variety of useful hardware and software solutions is reviewed. It is shown that faults can be corrected efficiently by bypassing the faulty column of the array, and a novel technique is described which detects processor faults with a very modest increase in circuitry. The addition of a parity check on the memory is sufficient to give an effective and efficient detection and correction of all permanent and many transient faults. Additionally, the use of a full parity processor increases the proportion of transient faults detected.
Keywords :
computerised picture processing; fault tolerant computing; parallel processing; array computers; fault correction; fault detection; fault tolerance; full parity processor; hardware; image processing; memory; software;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
DOI :
10.1049/ip-e:19820043
Filename :
4645413
Link To Document :
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