DocumentCode
922442
Title
Analytical estimation of vector access performance in parallel memory architectures
Author
Harper, D.T., III ; Costa, Yashodara
Author_Institution
Dept. of Electr. Eng., Texas Univ., Richardson, TX, USA
Volume
42
Issue
5
fYear
1993
fDate
5/1/1993 12:00:00 AM
Firstpage
616
Lastpage
624
Abstract
A limiting factor in high-performance vector computers is the rate at which data can be moved to and from memory during vector loads and stores. To increase the bandwidth of vector memory operations, several investigators have proposed the use of noninterleaved storage mappings, also known as storage schemes. A method of analyzing the performance of vector references for the class of storage schemes referred to as XOR schemes is described. The proposed measure of relative performance, the variability of an access, is defined and its computation is outlined. The use of variability as a performance indicator is demonstrated and compared with performance measurements made using simulation. One of the key aspects of the variability measure is its capability to lend insight to the transient behavior of vector accesses
Keywords
memory architecture; parallel architectures; performance evaluation; XOR schemes; high-performance vector computers; noninterleaved storage mappings; parallel memory architectures; performance measurements; variability measure; vector access performance; vector memory operations; vector references; Bandwidth; Computational modeling; Computer architecture; Concurrent computing; Degradation; Hardware; High performance computing; Measurement; Memory architecture; Performance analysis;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.223682
Filename
223682
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