DocumentCode :
922822
Title :
A 64-GHz fT and 3.6-V BVCEO Si bipolar transistor using in situ phosphorus-doped and large-grained polysilicon emitter contacts
Author :
Nanba, M. ; Uchino, T. ; Kondo, M. ; Nakamura, T. ; Kobayashi, T. ; Tamaki, Y. ; Tanabe, M.
Author_Institution :
Hitachi Ltd., Gunma, Japan
Volume :
40
Issue :
8
fYear :
1993
fDate :
8/1/1993 12:00:00 AM
Firstpage :
1563
Lastpage :
1565
Abstract :
A high-performance bipolar transistor has been developed using an in-situ phosphorus doped polysilicon (IDP) technique for emitter formation. The transistor demonstrated in ultrahigh current gain of 700, a maximum cutoff frequency fT(max) of 64 GHz, and a breakdown voltage between collector and emitter BVCEO of 3.6 V. At VCE values of 2 and 3 V, a product of fT(max) and BVCEO of 200 GHz-V has been achieved. This value is nearly equal to the physical limitation for homojunction silicon transistors
Keywords :
bipolar transistors; elemental semiconductors; phosphorus; silicon; 3.6 V; 64 GHz; bipolar transistor; cutoff frequency; emitter formation; homojunction silicon transistors; large-grained polysilicon emitter contacts; ultrahigh current gain; Bipolar transistors; Cutoff frequency; Doping; Fabrication; Germanium silicon alloys; Isolation technology; MOSFETs; Silicon germanium; Substrates; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.223725
Filename :
223725
Link To Document :
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