Title :
Fault tolerance in a systolic residue arithmetic processor array
Author :
Cosentino, Ronald J.
Author_Institution :
MITRE Corp., Bedford, MA, USA
fDate :
7/1/1988 12:00:00 AM
Abstract :
The regularity of systolic arrays and the potential for redundancy in residue number systems are used to provide fault tolerance in VLSI systems. The fault tolerance is concurrent with normal circuit operation and allows a continuous flow of correct data when a fault occurs. There is no interruption of valid data flow while the circuits are reconfigured. The technique also obviates the need for ultrahigh-reliability switches and switching control circuits. A fault-tolerant implementation of a finite-impulse-response filter with five residue channels, two of which are redundant, demonstrates the technique. As long as not more than one cell in each processing block is faulty, the filter outputs contain no errors
Keywords :
digital arithmetic; fault tolerant computing; VLSI systems; fault tolerance; finite-impulse-response filter; redundancy; systolic residue arithmetic processor array; ultrahigh-reliability switches; Arithmetic; Circuit faults; Fault tolerance; Fault tolerant systems; Filters; Redundancy; Switches; Switching circuits; Systolic arrays; Very large scale integration;
Journal_Title :
Computers, IEEE Transactions on