Title :
A dual-strained CMOS structure through simultaneous formation of relaxed and compressive strained-SiGe-on-insulator
Author :
Bera, L.K. ; Mukherjee-Roy, M. ; Abidha, B. ; Agarwal, A. ; Loh, W.Y. ; Tung, C.H. ; Kumar, R. ; Trigg, A.D. ; Foo, Y.L. ; Tripathy, S. ; Lo, G.Q. ; Balasubramanian, N. ; Kwong, D.L.
Author_Institution :
Inst. of Microelectron., Singapore, Singapore
fDate :
5/1/2006 12:00:00 AM
Abstract :
This letter reports on an integration of dual-strained surface-channel CMOS structure, i.e., tensile-strained Si n-MOSFET and compressive strained-SiGe p-MOSFET. This has been accomplished by forming the relaxed and compressive strained-SiGe layers simultaneously on an Si/SiGe-on-insulator (SOI) substrate, through varying SiGe film thicknesses, followed by a thermal condensation technique to convert the Si body into SiGe with different [Ge] concentration and with different strains (including the relaxed state). A thin Si film was selectively deposited over the relaxed SiGe region. The p-MOSFET in compressive (ε∼ -1.07%) strained- Si0.55Ge0.45 and the n-MOSFET in tensile-strained Si over the relaxed Si0.80Ge0.20 exhibited significant hole (enhancement factor ∼ 1.9) and electron (enhancement factor ∼ 1.6) mobility enhancements over the Si reference.
Keywords :
Ge-Si alloys; MOSFET; condensation; semiconductor materials; silicon-on-insulator; stress effects; SiGe; compressive strained-SiGe p-MOSFET; dual-strained CMOS structure; strained-SiGe-on-insulator; surface-channel CMOS structure; tensile-strained Si n-MOSFET; thermal condensation; Capacitive sensors; Charge carrier processes; Degradation; Electron mobility; Electrostatics; Germanium silicon alloys; MOSFET circuits; Semiconductor films; Silicon germanium; Substrates; Drain–current enhancement; Ge condensation; Si/SiGe-on-insulator (SOI); electron and hole mobility; strained and relaxed SiGe;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2006.872353
