DocumentCode
924783
Title
Optimisation of depletion-mode transistors for an m.o.s. p-channel technology
Author
Schemmert, W. ; H¿¿fflinger, B.
Author_Institution
Universitÿt Dortmund, Lehrstuhl Bauelemente der Elektrotechnik, Dortmund, West Germany
Volume
9
Issue
23
fYear
1973
Firstpage
555
Lastpage
556
Abstract
Recent advances in p-channel m.o.s. integrated circuits are the result of using depletion-mode load transistors which provide currents proportional to the square of their threshold voltage. Using ion implantation, limits are set to the maximum obtainable threshold voltage depending on the implantation parameters. Their systematic investigation is reported and the resulting optimum parameters for threshold voltage shifts exceeding 6 V are given.
Keywords
field effect transistors; integrated circuit production; ion implantation; MOS; depletion mode; field effect transistors; integrated circuit production; ion implantation; optimisation;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19730408
Filename
4236363
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