• DocumentCode
    924813
  • Title

    Bit-level systolic array circuit for matrix vector multiplication

  • Author

    McCanny, J.V. ; McWhirter, J.G.

  • Author_Institution
    Royal Signals and Radar Establishment, Malvern, UK
  • Volume
    130
  • Issue
    4
  • fYear
    1983
  • fDate
    8/1/1983 12:00:00 AM
  • Firstpage
    125
  • Lastpage
    130
  • Abstract
    A bit-level systolic array for computing matrix x vector products is described. The operation is carried out on bit parallel input data words and the basic circuit takes the form of a 1-bit slice. Several bit-slice components must be connected together to form the final result, and the paper outlines two different ways in which this can be done. The basic array also has considerable potential as a stand-alone device, and its use in computing the Walsh-Hadamard transform and discrete Fourier transform operations is briefly discussed.
  • Keywords
    bit-slice computers; cellular arrays; computerised signal processing; integrated logic circuits; matrix algebra; multiplying circuits; parallel processing; Walsh-Hadamard transform; bit parallel input data words; bit-level systolic array; bit-slice components; bit-slice computers; computing matrix-vector products; discrete Fourier transform; matrix vector multiplication; parallel processing; stand-alone device;
  • fLanguage
    English
  • Journal_Title
    Electronic Circuits and Systems, IEE Proceedings G
  • Publisher
    iet
  • ISSN
    0143-7089
  • Type

    jour

  • DOI
    10.1049/ip-g-1:19830023
  • Filename
    4645690