Title :
Real-time maximum value determination on an easily testable VLSI architecture
Author :
Vai, Mankuan ; Moy, Man Min
Author_Institution :
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
fDate :
4/1/1993 12:00:00 AM
Abstract :
An algorithm is presented for determining the maximum value of n numerical elements on a VLSI architecture. The computational complexity of this algorithm does not depend on the number of elements, so that it is suitable for real-time applications. The architecture is easily testable, and a simple scheme for the generation of its test vectors is provided
Keywords :
VLSI; built-in self test; computational complexity; integrated circuit testing; computational complexity; maximum value; real-time applications; test vectors; testable VLSI architecture; Application software; Circuit simulation; Circuit testing; Clocks; Computational complexity; Computer architecture; Out of order; Signal processing algorithms; Sorting; Very large scale integration;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
