Title :
Four-valued memory circuit using three-peak MOS-NDR devices and circuits
Author :
Gan, K.-J. ; Chen, Y.-H. ; Tsai, C.-S. ; Su, L.-X.
Author_Institution :
Dept. of Electron. Eng., Kun Shan Univ., Tainan, Taiwan
fDate :
4/27/2006 12:00:00 AM
Abstract :
A four-valued memory circuit using the three-peak MOS-NDR circuit as the driver and a current source as the load is demonstrated. The fabrication of the circuit is based on the standard 0.35 μm CMOS process.
Keywords :
CMOS memory circuits; constant current sources; driver circuits; negative resistance circuits; 0.35 micron; CMOS process; MOS-NDR circuit; MOS-NDR devices; current source; driver circuits; four-valued memory circuit; negative differential resistance;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20063634
