• DocumentCode
    925631
  • Title

    A high-performance directly insertable self-aligned ultra-rad-hard and enhanced isolation field-oxide technology for gigahertz silicon NMOS/CMOS VLSI

  • Author

    Manchanda, Lalitha ; Hillenius, Steven J. ; Lynch, William T. ; Cong, Hong-Ih ; Ng, Kwok K. ; Field, Richard L., Jr.

  • Author_Institution
    AT&T Bell Lab., Murray Hill, NJ, USA
  • Volume
    36
  • Issue
    4
  • fYear
    1989
  • fDate
    4/1/1989 12:00:00 AM
  • Firstpage
    651
  • Lastpage
    658
  • Abstract
    The authors describe a novel field-oxide structure for rad-hard NMOS/CMOS VLSI. This is a three-layer structure consisting of a thin thermal oxide, a doped polysilicon sheet deposited on the thin oxide, and a thick CVD (chemical-vapor-deposited) oxide layer on the polysilicon. The small effective electrical thickness of the oxide combined with the ground potential of the polysilicon enhances the radiation hardness and maintains good isolation, even at radiation levels as high as 108 rads and above. For 100-A gate oxide, the subthreshold leakage of a MOSFET (MOS field effect transistor) with a field shield structure is less than 10-13 A/μm, and the off current is less than 10-12 A/μm, after a total dose of 100 Mrad. This structure is self-aligned and directly insertable into submicron NMOS/CMOS VLSI without any changes in the circuit design. The circuits made with this technology can operate at 2.5-3 GHz, even after a total dose of 50-100 Mrad
  • Keywords
    CMOS integrated circuits; MOS integrated circuits; VLSI; elemental semiconductors; insulated gate field effect transistors; radiation hardening (electronics); 2.5 to 3 GHz; 50E6 to 1E8 Rad; CVD; MOSFET; NMOS/CMOS VLSI; Si; directly insertable self-aligned ultra-rad-hard; effective electrical thickness; enhanced isolation field-oxide technology; field shield structure; ground potential; radiation levels; subthreshold leakage; thin thermal oxide; CMOS technology; Capacitance; Integrated circuit technology; Isolation technology; MOS devices; MOSFETs; Radiation hardening; Silicon; Threshold voltage; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.22470
  • Filename
    22470