Title :
Coherent design of asynchronous circuits
Author_Institution :
¿¿sterreichische Akademie der Wissenschaften, Institut f¿¿r Informationsverarbeitung, Wien, Austria
fDate :
11/1/1983 12:00:00 AM
Abstract :
A design procedure for asynchronous sequential circuits is presented, which is based on a nonambiguous tree representation of the circuit´s behaviour, this representation eliminating both the need for merging a flow table as well as that of encoding internal states. No critical races occur. It is still a drawback of the method that it does not always lead to the minimum number of internal states.
Keywords :
asynchronous sequential logic; logic design; sequential circuits; asynchronous sequential circuits; coherent design; encoding; flow table; nonambiguous tree representation;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
DOI :
10.1049/ip-e.1983.0043