• DocumentCode
    925880
  • Title

    Efficient computer method for ExOR logic design

  • Author

    Besslich, Ph.W.

  • Author_Institution
    University of Bremen, Department of Electrical Engineering, Bremen, West Germany
  • Volume
    130
  • Issue
    6
  • fYear
    1983
  • fDate
    11/1/1983 12:00:00 AM
  • Firstpage
    203
  • Lastpage
    206
  • Abstract
    Application of exclusive-OR logic design suffers from a lack of straightforward design methods. Recently a procedure using generalised Reed-Muller (GRM) coefficient maps has been proposed. Based on this approach, an efficient computer method is developed for the generation of all 2n sets of GRM coefficients of an n-variable Boolean function. Along with the coefficients a metric may be calculated from which the minimum cost set according to some criterion may be selected. The method requires a storage of 2n bits and an average of 2n-1 + n/2 ExOR single-bit operations per set of GRM coefficients.
  • Keywords
    logic CAD; logic circuits; ExOR logic design; efficient computer method; generalised Reed-Muller coefficient maps; n-variable Boolean function;
  • fLanguage
    English
  • Journal_Title
    Computers and Digital Techniques, IEE Proceedings E
  • Publisher
    iet
  • ISSN
    0143-7062
  • Type

    jour

  • DOI
    10.1049/ip-e.1983.0045
  • Filename
    4645813