DocumentCode
925950
Title
Clock breakthrough in ECL integrated circuits
Author
Hawker, I.
Author_Institution
British Telecom, Research Laboratories, Ipswich, UK
Volume
130
Issue
6
fYear
1983
fDate
12/1/1983 12:00:00 AM
Firstpage
252
Lastpage
256
Abstract
Clock breakthrough in emitter-coupled-logic integrated circuits has been investigated by measurement and computer simulation of a clocked bistable operated at clock rates of 80¿320 MHz. The causes of clock breakthrough have been identified and methods of reducing the effect examined.
Keywords
bipolar integrated circuits; emitter-coupled logic; integrated logic circuits; synchronisation; transients; ECL integrated circuits; bipolar IC; clock breakthrough; clocked bistable; computer simulation; logic circuits; measurement; second-order transients; synchronisation;
fLanguage
English
Journal_Title
Electronic Circuits and Systems, IEE Proceedings G
Publisher
iet
ISSN
0143-7089
Type
jour
DOI
10.1049/ip-g-1:19830047
Filename
4645822
Link To Document