DocumentCode :
926654
Title :
Area-efficient architectures for the Viterbi algorithm II. Applications
Author :
Shung, C. Bernard ; Lin, Horng-Dar ; Cypher, Robert ; Siegel, Paul H. ; Thapar, Hemant K.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
Volume :
41
Issue :
5
fYear :
1993
fDate :
5/1/1993 12:00:00 AM
Firstpage :
802
Lastpage :
807
Abstract :
In part I the theoretical foundations of a new class of area-efficient architectures for the Viterbi algorithm were established. Area-efficient architectures for practical codes are presented here to illustrate the design procedures and demonstrate the favourable area-time tradeoff results. Three examples from convolutional codes, matched-spectral-null (MSN) trellis codes, and Ungerboeck codes are presented. The application of the area-efficient techniques to codes with a very large number of states, codes with time-varying trellises, and a programmable Viterbi decoder is discussed
Keywords :
convolutional codes; decoding; trellis codes; Ungerboeck codes; Viterbi algorithm; area-efficient architectures; convolutional codes; matched spectral null trellis codes; practical codes; programmable Viterbi decoder; time-varying trellises; Communications Society; Convolutional codes; Decoding; Modulation coding; Partial response channels; Pipelines; Scheduling; Signal processing; Very large scale integration; Viterbi algorithm;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/26.225495
Filename :
225495
Link To Document :
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