DocumentCode :
927018
Title :
Speeding up processing with approximation circuits
Author :
Lu, Shih-Lien
Volume :
37
Issue :
3
fYear :
2004
fDate :
3/1/2004 12:00:00 AM
Firstpage :
67
Lastpage :
73
Abstract :
Current microprocessors employ a global timing reference to synchronize data transfer. A synchronous system must know the maximum time needed to compute a function, but a circuit usually finishes computation earlier than the worst-case delay. The system nevertheless waits for the maximum time bound to guarantee a correct result. As a first step in achieving variable pipeline delays based on data values, approximation circuits can increase clock frequency by reducing the number of cycles a function requires. Instead of implementing the complete logic function, a simplified circuit mimics it using rough calculations to predict results. The results are correct most of the time, and simulations show improvements in overall performance in spite of the overhead needed to recover from mistakes.
Keywords :
circuit simulation; microprocessor chips; performance evaluation; pipeline processing; synchronisation; approximation circuits; clock frequency; microprocessors; performance; processing speedup; simulations; synchronization; variable pipeline delays; Adders; Circuits; Clocks; Delay; Frequency; Logic; Microprocessors; Parallel processing; Performance gain; Pipelines;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/MC.2004.1274006
Filename :
1274006
Link To Document :
بازگشت