DocumentCode
927223
Title
Improved floating-gate devices using standard CMOS technology
Author
Montalvo, Antonio J. ; Paulos, John J.
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Volume
14
Issue
8
fYear
1993
Firstpage
372
Lastpage
374
Abstract
A standard 2- mu m, double-polysilicon, CMOS technology has been used to fabricate a floating-gate MOSFET. The 12- mu m*17- mu m device is electrically programmed using hot-electron injection and electrically erased using Fowler-Nordheim tunneling. Both operations can be performed with voltages lower than the junction breakdown voltage of the process, allowing high integration density and improved reliability. Programming times of hundreds of microseconds and erase times of tends of milliseconds are reported, both for a Delta V/sub t/ of 3 V. The programming time is about five orders of magnitude shorter than that of previously reported devices in a similar technology. The device is suitable for both analog and digital applications.<>
Keywords
CMOS integrated circuits; hot carriers; insulated gate field effect transistors; semiconductor storage; tunnelling; 2 micron; 3 V; Fowler-Nordheim tunneling; MOSFET; double-polysilicon; electrically erased; electrically programmed; floating-gate devices; hot-electron injection; junction breakdown voltage; onchip nonvolatile storage; polycrystalline Si; programming time; standard CMOS technology; weight storage; Breakdown voltage; CMOS technology; Capacitance; Electrons; Low voltage; MOSFET circuits; Neural networks; Process design; Read only memory; Tunneling;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.225583
Filename
225583
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