Title :
Simulation of sub-0.1- mu m MOSFETs with completely suppressed short-channel effect
Author :
Tanaka, Junko ; Toyabe, Toru ; Ihara, Sigeo ; Kimura, Shin´ichiro ; Noda, Hiromasa ; Itoh, Kiyoo
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Abstract :
MOSFETs in the sub-0.1- mu m regime were investigated using a nonplanar device simulator CADDETH-NP. It was found that even in this regime, the short-channel effect can be suppressed in grooved gate MOSFETs because of the concave corner of the gate insulator. MOSFETs with a gate length of 0.05 mu m or less with no threshold voltage lowering can be made by optimizing the concave corner radius, junction depths, and channel doping.<>
Keywords :
digital simulation; electronic engineering computing; insulated gate field effect transistors; semiconductor device models; 0.05 to 0.1 micron; CADDETH-NP; MOSFETs; channel doping; concave corner radius; gate insulator; grooved gate; junction depths; nonplanar device simulator; suppressed short-channel effect; threshold voltage lowering; Conductivity; Doping; Equations; FETs; Insulation; MOSFETs; Subthreshold current; Threshold voltage; Transconductance; Tunneling;
Journal_Title :
Electron Device Letters, IEEE
