DocumentCode :
928357
Title :
A data compression technique for built-in self-test
Author :
Reddy, Sudhakar M. ; Saluja, Kewal K. ; Karpovsky, Mark G.
Author_Institution :
Dept of Electr. & Comput. Eng., Iowa Univ., IA, USA
Volume :
37
Issue :
9
fYear :
1988
fDate :
9/1/1988 12:00:00 AM
Firstpage :
1151
Lastpage :
1156
Abstract :
A data compression technique called self-testable and error-propagating space compression is proposed and analyzed. Faults in a realization of Exclusive-OR and Exclusive-NOR gates are analyzed, and the use of these gates in the design of self-testing and error propagating space compressors is discussed. It is argued that the proposed data-compression technique reduce the hardware complexity in built-in self-test (BIST) logic designs using external tester environments
Keywords :
automatic testing; data compression; logic testing; BIST; Exclusive-NOR; Exclusive-OR; built-in self-test; data compression technique; error-propagating space compression; fault analysis; self-testing; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Compressors; Computer errors; Data compression; Logic testing; Sorting; System testing;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.2271
Filename :
2271
Link To Document :
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